ESPRIT '88: Putting the Technology to Use : Proceedings of the 5th Annual ESPRIT Conference, Brussels, November 14-17, 1988, Part 1North-Holland, 1988 - 1759 pages Part1. Advanced microelectronics. VLSI technologies - comparisons and prospects. Software technology. Advanced information processing. Part2. Office systems.Computer integrated manufacturing. Information exchange system. |
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Page 65
270° Fig.12-(a) Comparison of calculated (O) and measured (A) transfer factors
szi and six of the 0,5pm MESFET chip No.2; f = 0 to 18 GHz. Scaling: szi] = 0 to
3.0, siz| = 0 to 0.1, (b) Comparison of calculated (O) and measured (A) reflection ...
270° Fig.12-(a) Comparison of calculated (O) and measured (A) transfer factors
szi and six of the 0,5pm MESFET chip No.2; f = 0 to 18 GHz. Scaling: szi] = 0 to
3.0, siz| = 0 to 0.1, (b) Comparison of calculated (O) and measured (A) reflection ...
Page 93
In figure 5 we have plotted in a qualitative way the dependence of the most
important yield factors as a function of the cell occupation ratio. From this diagram
the yield factors can be extracted for arbitrary members of the gate array family.
In figure 5 we have plotted in a qualitative way the dependence of the most
important yield factors as a function of the cell occupation ratio. From this diagram
the yield factors can be extracted for arbitrary members of the gate array family.
Page 232
These factors are placing demands for increased density on existing
interconnection media. One of the key limiting factors of present technology is the
density of electical via: holes which connect the various layers of the
interconnection ...
These factors are placing demands for increased density on existing
interconnection media. One of the key limiting factors of present technology is the
density of electical via: holes which connect the various layers of the
interconnection ...
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Contents
A Technology Transfer from Research to Development Project | 3 |
BitRate Reduction of High Quality Audio Signals Using FloatingPoint | 13 |
Materials and Devices Toward ThreeDimensional Integration Project 245 | 22 |
Copyright | |
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achieved active algorithm allows analysis application approach architecture basic block called cell chip circuit CMOS combination communication complex components concepts connected considered consists constraints contains defined definition demonstrator described devices direction distributed efficient environment error ESPRIT etch evaluation example execution Figure function gate given goal implementation important input integrated interface interpreter knowledge language layer logic machine material means measurements memory metal method module node objects obtained operator output parallel pattern PCTE performance phase possible presented problem processor prototype reference representation represented requirements rules selected sequence shown shows signal simulation single specification step structure task techniques theory transistor verification wafer