ESPRIT '88: Putting the Technology to Use : Proceedings of the 5th Annual ESPRIT Conference, Brussels, November 14-17, 1988, Part 1North-Holland, 1988 - 1759 pages Part1. Advanced microelectronics. VLSI technologies - comparisons and prospects. Software technology. Advanced information processing. Part2. Office systems.Computer integrated manufacturing. Information exchange system. |
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Page 72
... layer needs to be overgrown . Furthermore such a layer may be grown over the entire structure removing the need for selective growth and resulting in a substantially planar surface . The conventional BRS structure is fabricated on an n ...
... layer needs to be overgrown . Furthermore such a layer may be grown over the entire structure removing the need for selective growth and resulting in a substantially planar surface . The conventional BRS structure is fabricated on an n ...
Page 73
... layers epitaxially on a n - InP substrate . The layers comprise an n - InP buffer layer , an InGaAsP ( 1.3 μm ) , a p - InP embedding layer and a p - InGaAsP cap layer . A laser stripe is next etched using a PECVD Sią mask which also ...
... layers epitaxially on a n - InP substrate . The layers comprise an n - InP buffer layer , an InGaAsP ( 1.3 μm ) , a p - InP embedding layer and a p - InGaAsP cap layer . A laser stripe is next etched using a PECVD Sią mask which also ...
Page 75
... layer followed by a selective Zn diffusion to define the p region . Diffusion takes place through a silicon nitride mask which also serves to passivate the resulting pn junction . The diffused pin photodiodes ( 40 pm diameter ) exhibit ...
... layer followed by a selective Zn diffusion to define the p region . Diffusion takes place through a silicon nitride mask which also serves to passivate the resulting pn junction . The diffused pin photodiodes ( 40 pm diameter ) exhibit ...
Contents
A Technology Transfer from Research to Development Project | 3 |
BitRate Reduction of High Quality Audio Signals Using FloatingPoint | 13 |
Materials and Devices Toward ThreeDimensional Integration Project 245 | 22 |
Copyright | |
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abstract algorithm allows analysis Aphrodite application approach architecture array basic behaviour BICMOS cell chip circuit CMOS communication complex components Computer concepts constraints database debugging defined demonstrator described devices distributed domain dynamic efficient environment error Esprit Project etching evaluation example execution expert systems Figure function GaAs gate GEODE global goal graphical IEEE implementation inference engine input integrated integrated circuits interaction interpreter kernel knowledge base knowledge representation layer LFSR logic programming machine mechanism memory MESFET method methodology module node object-oriented objects operations optimization output parallel parameters partial evaluation PCTE performance phase possible predicates problem Proc procedure processor Prolog Prolog III prototype query relations representation requirements rule semantic sequence signal simulation specific structure subcircuit SUPERNODE task techniques transistor transputer tuple UNIX VLSI wafer