## ESPRIT '88: Putting the Technology to Use : Proceedings of the 5th Annual ESPRIT Conference, Brussels, November 14-17, 1988, Part 1North-Holland, 1988 - 1759 pages Part1. Advanced microelectronics. VLSI technologies - comparisons and prospects. Software technology. Advanced information processing. Part2. Office systems.Computer integrated manufacturing. Information exchange system. |

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Page 203

Circular shift '

must be possible to test any block of logic with , at most , 220

limitation being set by the length of time taken to run the test and the cost of fault -

free ...

Circular shift '

**pattern**generator - for generating sliding**pattern**sequences . ... Itmust be possible to test any block of logic with , at most , 220

**patterns**, thislimitation being set by the length of time taken to run the test and the cost of fault -

free ...

Page 204

It can be described as a ' degenerate ' form of random

Therefore the probability of detecting the fault with a single random

is given by : Pi > 2 - N So the probability of detecting the fault with M random

It can be described as a ' degenerate ' form of random

**pattern**test [ 3 ] . ...Therefore the probability of detecting the fault with a single random

**pattern**( P1 )is given by : Pi > 2 - N So the probability of detecting the fault with M random

**patterns**is ...Page 211

HOLD it is possible to hold a fixed

typically data inputs . QUASI_EXHAUSTIVE - a port with only a small number of

bits ...

HOLD it is possible to hold a fixed

**pattern**on a port . RANDOM - random subset**patterns**can be applied to a port which is too wide for exhaustive**patterns**,typically data inputs . QUASI_EXHAUSTIVE - a port with only a small number of

bits ...

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### Contents

A Technology Transfer from Research to Development Project | 3 |

BitRate Reduction of High Quality Audio Signals Using FloatingPoint | 13 |

Materials and Devices Toward ThreeDimensional Integration Project 245 | 22 |

Copyright | |

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### Common terms and phrases

achieved active algorithm allows analysis application approach architecture basic block called cell chip circuit CMOS combination communication complex components concepts connected considered consists constraints contains defined definition demonstrator described devices direction distributed efficient environment error ESPRIT etch evaluation example execution Figure function gate given goal implementation important input integrated interface interpreter knowledge language layer logic machine material means measurements memory metal method module node objects obtained operator output parallel pattern PCTE performance phase possible presented problem processor prototype reference representation represented requirements rules selected sequence shown shows signal simulation single specification step structure task techniques theory transistor verification wafer