ESPRIT '88: Putting the Technology to Use : Proceedings of the 5th Annual ESPRIT Conference, Brussels, November 14-17, 1988, Part 1North-Holland, 1988 - 1759 pages Part1. Advanced microelectronics. VLSI technologies - comparisons and prospects. Software technology. Advanced information processing. Part2. Office systems.Computer integrated manufacturing. Information exchange system. |
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Page 804
i) Each library routine has a master process which resides on the same
transputer as the user program. Compiled code for the slave processes of a given
library routine is stored as a character array within this master routine, along with
load ...
i) Each library routine has a master process which resides on the same
transputer as the user program. Compiled code for the slave processes of a given
library routine is stored as a character array within this master routine, along with
load ...
Page 810
The efficiency results we have obtained refer so far only to quite small arrays (16
transputers) and we feel strongly the need to ... These and other results lead us to
the following tentative conclusions: 1) The architecture of transputer arrays is ...
The efficiency results we have obtained refer so far only to quite small arrays (16
transputers) and we feel strongly the need to ... These and other results lead us to
the following tentative conclusions: 1) The architecture of transputer arrays is ...
Page 886
The SUPERNODE architecture [Harp87) is a fully reconfigurable hierarchical
array of Inmos T800 Transputers. The basic SUPERNODE consists of 17
Transputers: 16 worker transputers and 1 controller transputer. A cross-bar switch
to which ...
The SUPERNODE architecture [Harp87) is a fully reconfigurable hierarchical
array of Inmos T800 Transputers. The basic SUPERNODE consists of 17
Transputers: 16 worker transputers and 1 controller transputer. A cross-bar switch
to which ...
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Contents
Technology Transfer from Research to Development Project 97 Pype P Van Meerbergen J De Man | 5 |
Materials and Devices Toward ThreeDimensional Integration Project 245 Cahill C G Dunne B OFlanagan S Hobbs L Mathewson A | 21 |
Physical ºquivalentCircuit Models for GaAs Mesſets Project 255 Ghione G Naldi C Pettenpaul E Ponse F | 52 |
Copyright | |
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abstract abstract machine algorithm allows analysis Aphrodite application approach architecture Artificial Intelligence basic behaviour BFNEW BICMOS cell chip circuit CMOS complex components Computer concepts constraints DAIDA database defined definition described devices distributed domain dynamic environment error Esprit Project etch evaluation example execution expert systems Figure function GaAs gate global goal graphical GRASPIN IEEE implementation information system input integrated interaction interpreter knowledge base knowledge representation language layer LFSR logic programming machine mapping MESFET metaclass method methodology migration module node object-oriented objects operations output parallel parameters partial evaluation PCTE performance phase PIMS possible predicates problem procedure processor programming language project management Prolog Prolog III prototype query representation requirements rules semantic signal simulation specification structure subcircuit task techniques transistor transputer UNIX user interface VLSI wafer