ESPRIT '88: Putting the Technology to Use : Proceedings of the 5th Annual ESPRIT Conference, Brussels, November 14-17, 1988, Part 1North-Holland, 1988 - 1759 pages Part1. Advanced microelectronics. VLSI technologies - comparisons and prospects. Software technology. Advanced information processing. Part2. Office systems.Computer integrated manufacturing. Information exchange system. |
From inside the book
Results 1-3 of 49
Page 263
... Verification Assistant for VLSI Circuit Design * A.P. Kostelijk and G.G. Schrooten Philips Research Laboratories P.O. Box 80000 , WAY - 2 5600 JA Eindhoven , The Netherlands Bottom - up verification however remains important , The ...
... Verification Assistant for VLSI Circuit Design * A.P. Kostelijk and G.G. Schrooten Philips Research Laboratories P.O. Box 80000 , WAY - 2 5600 JA Eindhoven , The Netherlands Bottom - up verification however remains important , The ...
Page 269
... verification strategy are local electrical verification and sym- bolic analysis to reduce computational complexity and to provide relevant error mes- sages . Intelligent partitioning , based upon a derivation of the circuit's intended ...
... verification strategy are local electrical verification and sym- bolic analysis to reduce computational complexity and to provide relevant error mes- sages . Intelligent partitioning , based upon a derivation of the circuit's intended ...
Page 301
... verification as used in SLOCOP [ 16 ] has been combined with the algorithms for timing verification of multi- phase clocked systems where signal delays can propagate over level sensitive latches as published by T.Szymanski [ 10 ] ...
... verification as used in SLOCOP [ 16 ] has been combined with the algorithms for timing verification of multi- phase clocked systems where signal delays can propagate over level sensitive latches as published by T.Szymanski [ 10 ] ...
Contents
A Technology Transfer from Research to Development Project | 3 |
BitRate Reduction of High Quality Audio Signals Using FloatingPoint | 13 |
Materials and Devices Toward ThreeDimensional Integration Project 245 | 22 |
Copyright | |
56 other sections not shown
Common terms and phrases
abstract algorithm allows analysis Aphrodite application approach architecture array basic behaviour BICMOS cell chip circuit CMOS communication complex components Computer concepts constraints database debugging defined demonstrator described devices distributed domain dynamic efficient environment error Esprit Project etching evaluation example execution expert systems Figure function GaAs gate GEODE global goal graphical IEEE implementation inference engine input integrated integrated circuits interaction interpreter kernel knowledge base knowledge representation layer LFSR logic programming machine mechanism memory MESFET method methodology module node object-oriented objects operations optimization output parallel parameters partial evaluation PCTE performance phase possible predicates problem Proc procedure processor Prolog Prolog III prototype query relations representation requirements rule semantic sequence signal simulation specific structure subcircuit SUPERNODE task techniques transistor transputer tuple UNIX VLSI wafer